1. Field of the Invention
The present invention relates to a pin-type semiconductor photodetector and more particularly to a p-i-n semiconductor photodetector which can be used in short-wavelength (780 to 850 nm) LAN systems.
2. Description of Related Art
There have been proposed a pin-type semiconductor photodetector which will be described below referring to FIGS. 1 and 2.
In the conventional p-i-n semiconductor photodetector, on a main surface 1a of a single crystal semiconductor substrate 1 made of a p-type single crystal is arranged a single crystal semiconductor layer 3 made of a single crystal and 50 to 400 nm thick through an insulator film 2. In practice, this structure is fabricated by implantation of oxygen ions. For example, oxygen ions are implanted into a single crystal semiconductor substrate which is contemplated to constitute the single crystal semiconductor substrate 1 such that an insulator film 2 is formed so as to leave undoped single crystal semiconductor substrate 1 and single crystal semiconductor layer 3 lying thereunder and thereover, respectively. Hence, it should be noted that the insulator film 2 inevitably has a relatively large thickness as large as 110 nm.
Also, there are formed in the single crystal semiconductor layer 3 a p-type semiconductor region 4, an i-type semiconductor region 5, and an n-type semiconductor region 6, which extend between a main surface 3a of the single crystal semiconductor layer 3 on a side opposite to the insulator film 2 and a main surface 3b opposing to the main surface 3a such that the semiconductor regions 4, 5 and 6 are arranged in a pattern of stripes of 2 .mu.m, 3 .mu.m, and 2 .mu.m, respectively, wide in a sequence in which the i-type semiconductor region 5 is present between the p-type semiconductor region 4 and n-type semiconductor region 6 as seen both from the main surface 3a and from the main surface 3b of the single crystal semiconductor layer 3.
Further, on the main surface 3a of the single crystal semiconductor layer 3a are attached biasing electrodes 7 and 8 in ohmic contact to the p-type and n-type semiconductor regions 4 and 6, respectively. In addition, on a main surface 1b of the single crystal semiconductor substrate 1 which is opposite to the main surface 1a on which the insulator film 2 is formed, there is provided an electrode 9 as a depleting electrode.
In the conventional p-i-n semiconductor photodetector of the above-described construction, connecting an anode of the biasing power source 11 to the biasing electrode 8 attached to the n-type semiconductor region 6, the biasing electrode 7 attached to the p-type semiconductor region 4 to the ground through the load 12, and a cathode of the depleting power source 13, whose anode is grounded, to the depletion electrode 9, results in the formation of a depleted layer which extends from the side of the single crystal semiconductor substrate 1 to the side of the i-type semiconductor region 5 of the single crystal semiconductor layer 3 with a dimension depending on the value of a voltage for depletion obtained from the depleting power source 13. This occurs because the cathode side of the depleting power source 13 is connected to the depleting electrode 9 between the depleting electrode 9 and the ground. For this reason, use of a power source, as the depleting power source 13, which can provide a voltage sufficient to deplete all over the i-type semiconductor region 5 will allow depletion of the i-type semiconductor region 5 entirely.
If the i-type semiconductor region 5 is fully depleted as described above, there is formed in the depleted i-type semiconductor region 5 a drift electric field which drifts the carriers therein in the direction bridging the p-type semiconductor region 4 and n-type semiconductor region 6.
Since the biasing power source 11 is connected to the biasing electrodes 7 and 8 through the load 12, even if the i-type semiconductor region 5 is depleted due to the biasing voltage obtained from the biasing power source 11, the depletion does not distribute all over the i-type semiconductor region 5 for various practical reasons, for example, (1) it is impossible to elevate the biasing voltage to be obtained from the biasing power source 11 to a value higher than the voltage of 2 to 3.3 V currently obtained from the power source for driving the semiconductor integrated circuits described below; (2) in practice, the power source for driving a semiconductor integrated circuit is used as the biasing power source 11 since it is advantageous to use a driving power source providing a relatively low voltage as low as 2 to 3.3V as used in semiconductor integrated circuits when it is contemplated to construct a semiconductor integrated circuit comprising a p-i-n semiconductor photodetector and an insulated gate transistor, in which an optical detected output from the currently explained p-i-n semiconductor in a manner as described below is input to the insulated gate transistor; and (3) the i-type semiconductor region 5 in fact contains a relatively high concentration of a p-type or n-type dopant.
Also, according to the conventional p-i-n semiconductor photodetector as shown in FIGS. 1 and 2, in a state that the i-type semiconductor region 5 is depleted all over the region and a drift electric field is generated in the i-type semiconductor region 5, inputting a light from the main surface 3a to the single crystal semiconductor layer 3 generates in the single crystal semiconductor layer 3 carriers, i.e., electrons or holes, within the depleted i-type semiconductor region 5, and the electrons or holes are allowed to drift toward the p-type semiconductor region 4 or n-type semiconductor region 6, respectively, due to the drift electric field. This causes photocurrent to flow in the load 12 depending on the input light so that a voltage depending on the input light appears as an optical detected output from the both ends of the load 12 in a high response speed. Thus, a function of p-i-n semiconductor photodetector can be obtained.